10th International Conference on

Information Technology : New Generations

ITNG 2012

April 15-17, 2012, Las Vegas, Nevada, USA

www.itng.info

(Proceedings to be published by the Conference Publishing Services-CPS)

 

Track Chair
Fangyang Shen
fangyangshen@gmail.com
Mei Yang
Mei.Yang@unlv.edu


Track Committee
Weiqing Sun
wsun@eng.utoledo.edu

Shaobai Kan
skan@jjay.cuny.edu

Xiangdong Li
xli@citytech.cuny.edu

Donglin Hu
dzh0003@tigermail.auburn.edu

Yijun Liu
yjliu@gdut.edu.cn

Bing Qi
bing.qi@gmail.com

Anthony Fong
anthony.fong@cityu.edu.hk

Hsing-Bung Chen
hbchen@lanl.gov

Lingjia Liu
lingjialiu@eecs.ku.edu

Wael R. Elwasif
elwasifwr@ornl.gov

Roberto Gioiosa
gioiosa@ing.uniroma2.it

Yanqing Ji
ji@gonzaga.edu

Byeong Lee
byeong.lee@utsa.edu

Kevin Pedretti
ktpedre@sandia.gov

Jon Stearley
jrstear@sandia.gov

Zizong Chen
zchen@mines.edu

Ziliang Zong Ziliang.Zong@sdsmt.edu

Shengli Yuan
YuanS@uhd.edu

Parks Fields
parks@lanl.gov

Ling Wang
lwang@ftcl.hit.edu.cn

Enyue Lu
ealu@salisbury.edu


Important Dates:

Submission:
Oct 31, 2012
Author Notification:
Nov 30, 2012
Advance Registration:
Jan 11, 2013
Camera Ready:
Feb 1, 2013









































 
Special track on: High-Performance Computing Architectures

Scope:

The High-Performance Computing Architectures Track on ITNG 2013 is intended to provide a high-quality forum for researchers and practitioners to present their latest theoretical and practical work in this rapidly-changing area. Original papers are solicited in all aspects of high-performance computing architectures.

Topics:

  • Topics of interest include, but are not limited to, the following:
  • System-on-chip and network-on-chip architectures
  • Multicore processor architecture
  • Application modeling and mapping schemes for multicore/SoC systems
  • Multicore computing and programming techniques
  • Power-efficient architectures and techniques for multicore/SoC systems
  • High performance software systems and its applications, such as agent systems
  • Embedded and reconfigurable architectures
  • Nanocomputers and nano-circuits
  • Secure and reliable processor designs
  • Advanced computer architectures for general and application-specific enhancement
  • Parallel computer architectures
  • Cloud Computing
  • Application-specific processor/architecture designs
  • Cache and memory systems
  • High-performance I/O systems
  • Interconnect and network interface architectures
  • Microarchitecture design techniques: instruction-level parallelism, pipelining, caching, branch prediction, multithreading
  • Computer arithmetic
  • Innovative hardware/software trade-offs
  • Modeling and performance analysis
  • Complier designs
  • Security and Reliability Issues in Storage Systems
  • Tools and methodology for architecture designs
  • Verification and testing techniques

Paper Submission:

Papers should be original and contain contributions of theoretical or experimental nature, or be unique experience reports. Interested authors should submit a 6-page summary of their original and unpublished work including 5 keywords in the CPS format to the track chair. Electronic submission in the PDF, PS or MS Word format is strongly encouraged. For instructions on electronic submissions, Click here (we will update this link later on the main page).

Evaluation Process

Papers will be evaluated for originality, significance, clarity, and soundness. Per ITNG policy, except for invited papers, all papers will be reviewed by at least two independent reviewers. Accepted papers will be published in the conference proceedings with an ISBN.

Best Student Paper:

The Best Student Paper will be awarded at the conference. To be eligible, the student must be the sole author of the paper, or the first author and primary contributor. (The winner of the award will present the paper in a plenary session at the conference). A cover letter to the General Chair/Track Chair must identify the paper as a candidate for this competition at the time of submission.

Return to tracks main page